Azuro is an exciting new electronic design automation (EDA) software company that is enabling electronics companies around the world to build semiconductor chips that use significantly less power than ever before. Azuro’s first product, PowerCentric, targets the clock power problem in digital chip design. Without careful power management the clock network can account for as much as 80% of on-chip switching power. PowerCentric delivers a fully unified low power clock implementation solution to the designer which significantly reduces on-chip switching power above and beyond existing low power industry design flows. Azuro’s customers can translate this power saving advantage directly into enhanced functionality, talk time or play time on their devices. PowerCentric differs from existing industry design flows where clock gating and clock tree synthesis are performed at two different points in the flow. By unifying these operations at the placed gates level in the design flow, PowerCentric’s patent-pending iCTS™ technology is able to explore a larger global solution space of clock gating topologies and make superior power-timing trade-offs than current industry solutions. PowerCentric also includes a fully integrated vectorless active power reporting engine, eliminating the need to produce representative power testbenches before power characterizing a design.