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AccelChip  Acquired by Xilinx (2006 $ 21,500,000 )

1900 McCarthy Blvd #204
Milpitas, CA 95035
Website Company Summary Management Team

Outside board: (May no longer be on the board) Victor Westerlind (InterWest Partners Partner) Robert Schriesheim (Arch Development Partners);  David Strohm (Greylock Partners)

Business description: Now there’s a direct link between DSP and FPGA design environments. AccelChip’s unique high-level synthesis tool reads MATLAB and Simulink designs and outputs synthesizable RTL models and testbenches compatible with all FPGA design flows. AccelFPGA automatically creates synthesizable RTL models and simulation testbenches eliminating months of engineering time. The automated path from MATLAB and Simulink to RTL design flows eliminates ambiguous specifications and costly design spins. The architecture-aware compiler produces optimized RTL models for the targeted FPGA device.
Customers include: Powerwave Technologies
Partners include: AlteraCadence Design SystemsCoWareLeopard LogicMentor GraphicsQuickLogicSynopsysSynplicityXilinx;  Aldec;  Gidel;  Marubeni;  Mathworks;  Nallatech;  Systems4Silicon

Rounds: 2
Recent Fundings: May 2003
Capital raised: 9.9M
Last Round: 6.6M
Ownership: Acquired by Xilinx (2006 $ 21,500,000 )
VCs include: Crossbridge Venture PartnersGreylock PartnersInterWest Partners;  Arch Development Partners
Corporate investors: Xilinx;  Illinois Development Finance Authority

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Record updated: Jan 2006
Sector: Software
Year Founded: 2000
Rounds: 2
Recent Fundings: May 2003
Capital Raised: 9.9M
Last Round: 6.6M
Ownership: Acquired by Xilinx (2006 $ 21,500,000 )